Last week Manchester University announced that it is to use one million ARM cores to make a computer capable of simulating 1% of the human brain.
The computer will be built around SpiNNaker (Spiking Neural Network architecture), and the man behind it is Professor Steve Furber who not only lead the hardware design of Acorn’s BBC Micro, but also the original ARM processor – ARM originally stood for Acorn RISC Machine.
Rather than implement a particular algorithm, the SpiNNaker computer will offer a vast resource: a billion simulated neurons, and an extensive programmable connection network through which they can communicate.
Brain researchers will be able to test their theories by defining neuron behaviours and inter-neuron connections that will run what they hope are brain-like algorithms.
“Think of the SpiNNaker machine as an FPGA for neurons,” Furber told Electronics Weekly.
In general, neurons have many inputs (dendrites) and one output (axon).
The axon branches many times and connects (at synapses) to the dendrites of other neurons.
When electrical (through ion transfer) activity on a neuron’s dendrites reaches a certain level, the neuron fires and sends a pulse, or spike, along its axon to connected neurons
“All the other connected neurons know is when a neuron has fired,” said Furber. “We start from the address-event representation of neural networks: a selective multi-cast model. The idea is that if a neuron spikes, all it does is broadcast its identifier.”
Whereas a real neuron is physically connected to other neurons, in the address-event representation, when it spikes a virtual neuron will transmit its identification number into a grand network.
The virtual connection is made by programming other neurons only to respond to certain identifiers.
“Interconnection in SpiNNaker is done over a very lightweight packet-switched network,” said Furber.
SpiNNaker will be implemented using custom chips, each with 18 ARM cores with their own local memory (totalling 100kbytes), designed in Manchester and manufactured in Taiwan.
Each multi-processor chip is mounted with an off-the-shelf 128Mbyte mobile SDRAM in a 19×19mm 3D system-in-package from Unisem Europe.
The 18 core IC is claimed to deliver the computing power of a PC and dissipate 1W, said the University.
The chosen core, for which ARM has granted a licence to the University for the project, is the ARM968, ironically the first ARM not to have Furber’s fingerprints on it.
“The ARM7 is still recognisably mine,” he said. “The ARM9 has a five-stage pipeline and Harvard architecture. The ARM7 has a three-stage pipeline and von Neumann architecture. These are the two design sweet spots. Anything more complicated is less efficient, and the 968 is particularly energy efficient.”
Stated consumption is 0.12-0.23mW/MHz on a 130nm process.
Even with this power efficiency, the million core SpiNNaker Machine is expected to consume 50-100kW peak, although the average is predicted to be well below 50kW.
Why not use a more modern Cortex core?
“We have been doing the design for quite a long time and made architectural commitments in 2006,” explained Furber.
ARM was approached in May 2005 to participate in SpiNNaker and agreed make processor intellectual property available to the project along with a cell library to aid design and manufacturing.
Prototype chips were first made in 2009 and a four chip test board has been evaluated.
The next step is to plan a board with 8×8 chips on it – 1,153 cores, each fast enough to model 1,000 neurons.
Each chip has a bespoke router that routes multi-cast neural event packets using an associative routing table.
“Every packet that arrives is looked up to see where it is to be routed,” said Furber.
It can also do point-to-point routing and handle packets that are re-routed in flight.
One of the 18 cores runs system management on the die and all the others are available for modelling neurons although generally 16 will be used with one providing redundancy.
Also, some die are expected not to be prefect, so those with up to one faulty core can still be used.
The SDRAM will primarily be used for storing neural parameters for the simulate neurons, and data will pass in, out and through on the six bidirectional asynchronous busses that each chip is provided with.
Six busses means the ICs can be connected in one, two and three dimensional arrays if necessary, or 2D arrays with additional diagonal paths.
Asynchronous logic
Rather than have a conventional on-chip bus, to avoid potential issues that might arise from trying to synchronising 18 cores, SpiNNaker ICs are globally asynchronous, locally synchronous (GALS) .
There are two networks on each IC. One replaces the conventional bus, and the other provides on and off-chip packet switching.
Both are based on a delay-insensitive communication technology developed at the University of Manchester.
Furber is a fan of asynchronous communication and previously developed an series of clock-less asynchronous ARM cores called Amulet.
The system network was developed using a tool called Chainworks from Silistix that generates self-timed
on-chip interconnect, producing standard Verilog net lists.
Programmes ape the brain
Ideas for algorithms to try on the machine are coming from sources as diverse as wet neuroscience and psychology.
“We are actively engaging with neuroscientists and psychologists, both here at the University and elsewhere,” said Furber.
He points out that psychologists already have neural networks on which they can reproduce the clinical pathologies, and they use these neural networks to test therapies.
“At present, they are limited in the fidelity they can achieve with these networks by the available computer power, but we hope that SpiNNaker will raise that bar a lot higher.”
No one is claiming to know how a brain functions yet.
“We hope that our machine will enable significant progress towards understanding how the brain works as an information-processing system,” says Furber.
Manchester is getting £2.5m from the EPSRC for designing the architecture,
with the Universities of Southampton, Cambridge and Sheffield sharing another £2.5m for further work towards the computer.
£2.5m gets us most of the way to the one million core computer,
Source:http://www.electronicsweekly.com/Articles/2011/07/12/51444/inside-manchesters-million-arm-electronic-brain.htm
